Cs302 Quiz

1. Which of the following is the drawback of DRAM?
 Discharging of the capacitor over a period of time.
 All the information stored in terms of binary bits would be lost
 if capacitor is not recharged

2. With a 100 KHz clock frequency, eight bits can be serially entered
into a shift register in
 80 micro seconds
 8 micro seconds
 80 mili seconds
 10 micro seconds

3. A multiplexer with a register circuit converts
 Serial data to parallel
 Parallel data to serial
 Serial data to serial
 Parallel data to parallel

4. 32-bit data word consists of:
 2 bytes
 2 bytes
 2 nibbles
 4 nibbles

5. A stage in the shift register consists of
 a latch

6. A divide-by-10 Johnson counter requires

ten flip-flops
 our flip-flop
 five flip-flops
 five flip-flops

7. write data to the memory, the write cycle is initiated by
 assigning the values to variables.
 reserving the space for variables.
 applying the data signals.
8. The bit capacity of a memory that has 1024 addresses and can store
8 bits at each address is:
 8
 1024
 4096
 8192
9. To parallel load a byte of data into a shift register, there must be
 0ne clock pulse
 one clock pulse for each 1 in the data
 eight clock pulse
 one clock pulse for each 0 in the data
10. The 64-cell array organized as 8 x 8 cell array is considered
 as an 64 byte memory
 as a 16 byte memory